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Add tasks for all the new languages

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Tina Müller 2016-12-05 23:44:36 +01:00
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Lang/FRISC-Assembly/00DESCRIPTION Normal file
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{{stub}}{{language|FRISC Assembly}}
FRISC (Faculty of Electrical Engineering and Computing Reduced Instruction Set Computer) is a simplified 32-bit processor architecture developed at the University of Zagreb.

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Lang/FRISC-Assembly/Fibonacci-sequence Symbolic link
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../../Task/Fibonacci-sequence/FRISC-Assembly

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Lang/FRISC-Assembly/README Normal file
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Data source: http://rosettacode.org/wiki/Category:FRISC_Assembly