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406
Task/SHA-256/AArch64-Assembly/sha-256.aarch64
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406
Task/SHA-256/AArch64-Assembly/sha-256.aarch64
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/* ARM assembly AARCH64 Raspberry PI 3B */
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/* program sha256_64.s */
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/*******************************************/
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/* Constantes file */
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/*******************************************/
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/* for this file see task include a file in language AArch64 assembly*/
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.include "../includeConstantesARM64.inc"
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.equ LGHASH, 32 // result length
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/*******************************************/
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/* Structures */
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/********************************************/
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/* example structure variables */
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.struct 0
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var_a: // a
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.struct var_a + 4
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var_b: // b
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.struct var_b + 4
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var_c: // c
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.struct var_c + 4
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var_d: // d
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.struct var_d + 4
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var_e: // e
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.struct var_e + 4
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var_f: // f
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.struct var_f + 4
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var_g: // g
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.struct var_g + 4
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var_h: // h
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.struct var_h + 4
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/*********************************/
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/* Initialized data */
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/*********************************/
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.data
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szMessRosetta: .asciz "Rosetta code"
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szMessTest1: .asciz "abc"
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szMessSup64: .ascii "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
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.ascii "abcdefghijklmnopqrstuvwxyz"
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.asciz "1234567890AZERTYUIOP"
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szMessTest2: .asciz "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"
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szMessFinPgm: .asciz "Program End ok.\n"
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szMessResult: .asciz "Rosetta code => "
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szCarriageReturn: .asciz "\n"
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/* array constantes Hi */
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tbConstHi: .int 0x6A09E667 // H0
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.int 0xBB67AE85 // H1
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.int 0x3C6EF372 // H2
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.int 0xA54FF53A // H3
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.int 0x510E527F // H4
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.int 0x9B05688C // H5
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.int 0x1F83D9AB // H6
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.int 0x5BE0CD19 // H7
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/* array 64 constantes Kt */
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tbConstKt:
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.int 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5
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.int 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174
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.int 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da
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.int 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967
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.int 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85
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.int 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070
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.int 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3
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.int 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
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/*********************************/
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/* UnInitialized data */
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/*********************************/
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.bss
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.align 4
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qNbBlocs: .skip 8
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sZoneConv: .skip 24
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sZoneTrav: .skip 1000
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.align 8
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tbH: .skip 4 * 8 // 8 variables H
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tbabcdefgh: .skip 4 * 8
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tbW: .skip 4 * 64 // 64 words W
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/*********************************/
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/* code section */
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/*********************************/
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.text
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.global main
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main: // entry of program
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ldr x0,qAdrszMessRosetta
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//ldr x0,qAdrszMessTest1
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//ldr x0,qAdrszMessTest2
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//ldr x0,qAdrszMessSup64
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bl computeSHA256 // call routine SHA1
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ldr x0,qAdrszMessResult
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bl affichageMess // display message
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ldr x0, qAdrtbH
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bl displaySHA1
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ldr x0,qAdrszMessFinPgm
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bl affichageMess // display message
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100: // standard end of the program
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mov x0,0 // return code
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mov x8,EXIT // request to exit program
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svc 0 // perform the system call
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qAdrszCarriageReturn: .quad szCarriageReturn
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qAdrszMessResult: .quad szMessResult
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qAdrszMessRosetta: .quad szMessRosetta
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qAdrszMessTest1: .quad szMessTest1
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qAdrszMessTest2: .quad szMessTest2
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qAdrsZoneTrav: .quad sZoneTrav
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qAdrsZoneConv: .quad sZoneConv
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qAdrszMessFinPgm: .quad szMessFinPgm
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qAdrszMessSup64: .quad szMessSup64
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/******************************************************************/
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/* compute SHA1 */
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/******************************************************************/
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/* x0 contains the address of the message */
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computeSHA256:
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stp x1,lr,[sp,-16]! // save registers
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ldr x1,qAdrsZoneTrav
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mov x2,#0 // counter length
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debCopy: // copy string in work area
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ldrb w3,[x0,x2]
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strb w3,[x1,x2]
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cmp x3,#0
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add x4,x2,1
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csel x2,x4,x2,ne
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bne debCopy
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lsl x6,x2,#3 // initial message length in bits
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mov x3,#0b10000000 // add bit 1 at end of string
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strb w3,[x1,x2]
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add x2,x2,#1 // length in bytes
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str xzr,[x1,x2] // zeroes in end of array
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lsl x4,x2,#3 // length in bits
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addZeroes:
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lsr x5,x2,#6
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lsl x5,x5,#6
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sub x5,x2,x5
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cmp x5,#56
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beq storeLength // yes -> end add
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str xzr,[x1,x2] // add zero at message end
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add x2,x2,#1 // increment lenght bytes
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add x4,x4,#8 // increment length in bits
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b addZeroes
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storeLength:
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add x2,x2,#4 // add four bytes
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rev w6,w6 // inversion bits initials message length
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str w6,[x1,x2] // and store at end
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ldr x7,qAdrtbConstHi // constantes H address
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ldr x4,qAdrtbH // start area H
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mov x5,#0
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loopConst: // init array H with start constantes
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ldr w6,[x7,x5,lsl #2] // load constante
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str w6,[x4,x5,lsl #2] // and store
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add x5,x5,#1
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cmp x5,#8
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blt loopConst
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// split into block of 64 bytes
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add x2,x2,#4 //
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lsr x4,x2,#6 // blocks number
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ldr x0,qAdrqNbBlocs
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str x4,[x0] // save block maxi
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mov x7,#0 // n° de block et x1 contient l adresse zone de travail
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loopBlock: // begin loop of each block of 64 bytes
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mov x0,x7
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bl inversion // inversion each word because little indian
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ldr x3,qAdrtbW // working area W address
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mov x6,#0 // indice t
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/* x2 address begin each block */
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ldr x1,qAdrsZoneTrav
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add x2,x1,x7,lsl #6 // compute block begin indice * 4 * 16
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loopPrep: // loop for expand 80 words
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cmp x6,#15 //
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bgt expand1
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ldr w0,[x2,x6,lsl #2] // load word message
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str w0,[x3,x6,lsl #2] // store in first 16 block
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b expandEnd
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expand1:
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sub x8,x6,#2
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ldr w9,[x3,x8,lsl #2]
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ror w10,w9,#17 // fonction e1 (256)
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ror w11,w9,#19
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eor w10,w10,w11
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lsr w11,w9,#10
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eor w10,w10,w11
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sub x8,x6,#7
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ldr w9,[x3,x8,lsl #2]
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add w9,w9,w10 // + w - 7
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sub x8,x6,#15
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ldr w10,[x3,x8,lsl #2]
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ror w11,w10,#7 // fonction e0 (256)
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ror w12,w10,#18
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eor w11,w11,w12
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lsr w12,w10,#3
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eor w10,w11,w12
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add w9,w9,w10
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sub x8,x6,#16
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ldr w11,[x3,x8,lsl #2]
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add w9,w9,w11
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str w9,[x3,x6,lsl #2]
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expandEnd:
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add x6,x6,#1
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cmp x6,#64 // 64 words ?
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blt loopPrep // and loop
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/* COMPUTING THE MESSAGE DIGEST */
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/* x1 area H constantes address */
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/* x3 working area W address */
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/* x5 address constantes K */
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/* x6 counter t */
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/* x7 block counter */
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/* x8 addresse variables a b c d e f g h */
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// init variable a b c d e f g h
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ldr x0,qAdrtbH
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ldr x8,qAdrtbabcdefgh
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mov x1,#0
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loopInita:
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ldr w9,[x0,x1,lsl #2]
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str w9,[x8,x1,lsl #2]
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add x1,x1,#1
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cmp x1,#8
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blt loopInita
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ldr x1,qAdrtbConstHi
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ldr x5,qAdrtbConstKt
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mov x6,#0
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loop64T: // begin loop 64 t
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ldr w9,[x8,#var_h]
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ldr w10,[x8,#var_e] // calcul T1
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ror w11,w10,#6 // fonction sigma 1
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ror w12,w10,#11
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eor w11,w11,w12
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ror w12,w10,#25
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eor w11,w11,w12
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add w9,w9,w11 // h + sigma1 (e)
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ldr w0,[x8,#var_f] // fonction ch x and y xor (non x and z)
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ldr w4,[x8,#var_g]
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and w11,w10,w0
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mvn w12,w10
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and w12,w12,w4
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eor w11,w11,w12
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add w9,w9,w11 // h + sigma1 (e) + ch (e,f,g)
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ldr w0,[x5,x6,lsl #2] // load constantes k0
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add w9,w9,w0
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ldr w0,[x3,x6,lsl #2] // Wt
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add w9,w9,w0
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// calcul T2
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ldr w10,[x8,#var_a] // fonction sigma 0
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ror w11,w10,#2
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ror w12,w10,#13
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eor w11,w11,w12
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ror w12,w10,#22
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eor w11,w11,w12
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ldr w2,[x8,#var_b]
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ldr w4,[x8,#var_c]
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// fonction maj x and y xor x and z xor y and z
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and w12,w10,w2
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and w0,w10,w4
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eor w12,w12,w0
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and w0,w2,w4
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eor w12,w12,w0 //
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add w12,w12,w11 // T2
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// compute variables
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ldr w4,[x8,#var_g]
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str w4,[x8,#var_h]
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ldr w4,[x8,#var_f]
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str w4,[x8,#var_g]
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ldr w4,[x8,#var_e]
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str w4,[x8,#var_f]
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ldr w4,[x8,#var_d]
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add w4,w4,w9 // add T1
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str w4,[x8,#var_e]
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ldr w4,[x8,#var_c]
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str w4,[x8,#var_d]
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ldr w4,[x8,#var_b]
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str w4,[x8,#var_c]
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ldr w4,[x8,#var_a]
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str w4,[x8,#var_b]
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add w4,w9,w12 // add T1 T2
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str w4,[x8,#var_a]
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add x6,x6,#1 // increment t
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cmp x6,#64
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blt loop64T
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// End block
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ldr x0,qAdrtbH // start area H
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mov x10,#0
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loopStoreH:
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ldr w9,[x8,x10,lsl #2]
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ldr w3,[x0,x10,lsl #2]
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add w3,w3,w9
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str w3,[x0,x10,lsl #2] // store variables in H0
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add x10,x10,#1
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cmp x10,#8
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blt loopStoreH
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// other bloc
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add x7,x7,#1 // increment block
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ldr x0,qAdrqNbBlocs
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ldr x4,[x0] // restaur maxi block
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cmp x7,x4 // maxi ?
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blt loopBlock // loop other block
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ldr x0,qAdrtbH // return result address
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100:
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ldp x1,lr,[sp],16 // restaur 2 registers
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ret // return to address lr x30
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qAdrtbConstHi: .quad tbConstHi
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qAdrtbConstKt: .quad tbConstKt
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qAdrtbH: .quad tbH
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qAdrtbW: .quad tbW
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qAdrtbabcdefgh: .quad tbabcdefgh
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qAdrqNbBlocs: .quad qNbBlocs
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/******************************************************************/
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/* inversion des mots de 32 bits d un bloc */
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/******************************************************************/
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/* x0 contains N° block */
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inversion:
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stp x1,lr,[sp,-16]! // save registers
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stp x2,x3,[sp,-16]! // save registers
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ldr x1,qAdrsZoneTrav
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add x1,x1,x0,lsl #6 // debut du bloc
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mov x2,#0
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1: // start loop
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ldr w3,[x1,x2,lsl #2]
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rev w3,w3
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str w3,[x1,x2,lsl #2]
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add x2,x2,#1
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cmp x2,#16
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blt 1b
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100:
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ldp x2,x3,[sp],16 // restaur 2 registers
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ldp x1,lr,[sp],16 // restaur 2 registers
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ret // return to address lr x30
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/******************************************************************/
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/* display hash SHA1 */
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/******************************************************************/
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/* x0 contains the address of hash */
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displaySHA1:
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stp x1,lr,[sp,-16]! // save registers
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stp x2,x3,[sp,-16]! // save registers
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mov x3,x0
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mov x2,#0
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1:
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ldr w0,[x3,x2,lsl #2] // load 4 bytes
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//rev x0,x0 // reverse bytes
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ldr x1,qAdrsZoneConv
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bl conversion16_4W // conversion hexa
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ldr x0,qAdrsZoneConv
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bl affichageMess
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add x2,x2,#1
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cmp x2,#LGHASH / 4
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blt 1b // and loop
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ldr x0,qAdrszCarriageReturn
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bl affichageMess // display message
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100:
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ldp x2,x3,[sp],16 // restaur 2 registers
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ldp x1,lr,[sp],16 // restaur 2 registers
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ret // return to address lr x30
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/******************************************************************/
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/* conversion hexadecimal register 32 bits */
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/******************************************************************/
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/* x0 contains value and x1 address zone receptrice */
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conversion16_4W:
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stp x0,lr,[sp,-48]! // save registres
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stp x1,x2,[sp,32] // save registres
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stp x3,x4,[sp,16] // save registres
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mov x2,#28 // start bit position
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mov x4,#0xF0000000 // mask
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mov x3,x0 // save entry value
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1: // start loop
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and x0,x3,x4 // value register and mask
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lsr x0,x0,x2 // right shift
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cmp x0,#10 // >= 10 ?
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bge 2f // yes
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add x0,x0,#48 // no is digit
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b 3f
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2:
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add x0,x0,#55 // else is a letter A-F
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3:
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strb w0,[x1],#1 // load result and + 1 in address
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lsr x4,x4,#4 // shift mask 4 bits left
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subs x2,x2,#4 // decrement counter 4 bits <= zero ?
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bge 1b // no -> loop
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100: // fin standard de la fonction
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ldp x3,x4,[sp,16] // restaur des 2 registres
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ldp x1,x2,[sp,32] // restaur des 2 registres
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ldp x0,lr,[sp],48 // restaur des 2 registres
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ret
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/********************************************************/
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/* File Include fonctions */
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/********************************************************/
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/* for this file see task include a file in language AArch64 assembly */
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.include "../includeARM64.inc"
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