A-M baby

Task/Four-bit-adder/0DESCRIPTION

@@ -0,0 +1,23 @@
+The aim of this task is to "''simulate''" a four-bit adder "chip". This "chip" can be realized using four [[wp:Adder_(electronics)#Full_adder|1-bit full adder]]s. Each of these 1-bit full adders can be with two [[wp:Adder_(electronics)#Half_adder|half adder]]s and an ''or'' [[wp:Logic gate|gate]]. Finally a half adder can be made using a ''xor'' gate and an ''and'' gate. The ''xor'' gate can be made using two ''not''s, two ''and''s and one ''or''.
+
+'''Not''', '''or''' and '''and''', the only allowed "gates" for the task, can be "imitated" by using the [[Bitwise operations|bitwise operators]] of your language. If there is not a ''bit type'' in your language, to be sure that the ''not'' does not "invert" all the other bits of the basic type (e.g. a byte) we are not interested in, you can use an extra ''nand'' (''and'' then ''not'') with the constant 1 on one input.
+
+Instead of optimizing and reducing the number of gates used for the final 4-bit adder, build it in the most straightforward way, ''connecting'' the other "constructive blocks", in turn made of "simpler" and "smaller" ones.
+
+{|
+|+Schematics of the "constructive blocks"
+!Xor gate done with ands, ors and nots
+!A half adder
+!A full adder
+!A 4-bit adder
+|-
+|[[File:xor.png|frameless|Xor gate done with ands, ors and nots]]
+|[[File:halfadder.png|frameless|A half adder]]
+|[[File:fulladder.png|frameless|A full adder]]
+|[[File:4bitsadder.png|frameless|A 4-bit adder]]
+|}
+
+Solutions should try to be as descriptive as possible, making it as easy as possible to identify "connections" between higher-order "blocks". It is not mandatory to replicate the syntax of higher-order blocks in the atomic "gate" blocks, i.e. basic "gate" operations can be performed as usual bitwise operations, or they can be "wrapped" in a ''block'' in order to expose the same syntax of higher-order blocks, at implementers' choice.
+
+To test the implementation, show the sum of two four-bit numbers (in binary).
+<div style="clear:both"></div>

Task/Four-bit-adder/1META.yaml

@@ -0,0 +1,3 @@
+---
+category:
+- Electronics

Task/Four-bit-adder/Ada/four-bit-adder-1.ada

@@ -0,0 +1,23 @@
+type Four_Bits is array (1..4) of Boolean;
+
+procedure Half_Adder (Input_1, Input_2 : Boolean; Output, Carry : out Boolean) is
+begin
+   Output := Input_1 xor Input_2;
+   Carry  := Input_1 and Input_2;
+end Half_Adder;
+
+procedure Full_Adder (Input_1, Input_2 : Boolean; Output : out Boolean; Carry : in out Boolean) is
+   T_1, T_2, T_3 : Boolean;
+begin
+   Half_Adder (Input_1, Input_2, T_1, T_2);
+   Half_Adder (Carry, T_1, Output, T_3);
+   Carry := T_2 or T_3;
+end Full_Adder;
+
+procedure Four_Bits_Adder (A, B : Four_Bits; C : out Four_Bits; Carry : in out Boolean) is
+begin
+   Full_Adder (A (4), B (4), C (4), Carry);
+   Full_Adder (A (3), B (3), C (3), Carry);
+   Full_Adder (A (2), B (2), C (2), Carry);
+   Full_Adder (A (1), B (1), C (1), Carry);
+end Four_Bits_Adder;

Task/Four-bit-adder/Ada/four-bit-adder-2.ada

@@ -0,0 +1,52 @@
+with Ada.Text_IO;  use Ada.Text_IO;
+
+procedure Test_4_Bit_Adder is
+
+   -- The definitions from above
+
+   function Image (Bit : Boolean) return Character is
+   begin
+      if Bit then
+         return '1';
+      else
+         return '0';
+      end if;
+   end Image;
+
+   function Image (X : Four_Bits) return String is
+   begin
+      return Image (X (1)) & Image (X (2)) & Image (X (3)) & Image (X (4));
+   end Image;
+
+   A, B, C : Four_Bits; Carry : Boolean;
+begin
+   for I_1 in Boolean'Range loop
+      for I_2 in Boolean'Range loop
+         for I_3 in Boolean'Range loop
+            for I_4 in Boolean'Range loop
+               for J_1 in Boolean'Range loop
+                  for J_2 in Boolean'Range loop
+                     for J_3 in Boolean'Range loop
+                        for J_4 in Boolean'Range loop
+                           A := (I_1, I_2, I_3, I_4);
+                           B := (J_1, J_2, J_3, J_4);
+                           Carry := False;
+                           Four_Bits_Adder (A, B, C, Carry);
+                           Put_Line
+                           (  Image (A)
+                           &  " + "
+                           &  Image (B)
+                           &  " = "
+                           &  Image (C)
+                           &  " "
+                           &  Image (Carry)
+                           );
+                        end loop;
+                     end loop;
+                  end loop;
+               end loop;
+            end loop;
+         end loop;
+      end loop;
+   end loop;
+end Test_4_Bit_Adder;

Task/Four-bit-adder/BBC-BASIC/four-bit-adder.bbc

@@ -0,0 +1,45 @@
+      @% = 2
+      PRINT "1100 + 1100 = ";
+      PROC4bitadd(1,1,0,0, 1,1,0,0, e,d,c,b,a) : PRINT e,d,c,b,a
+      PRINT "1100 + 1101 = ";
+      PROC4bitadd(1,1,0,0, 1,1,0,1, e,d,c,b,a) : PRINT e,d,c,b,a
+      PRINT "1100 + 1110 = ";
+      PROC4bitadd(1,1,0,0, 1,1,1,0, e,d,c,b,a) : PRINT e,d,c,b,a
+      PRINT "1100 + 1111 = ";
+      PROC4bitadd(1,1,0,0, 1,1,1,1, e,d,c,b,a) : PRINT e,d,c,b,a
+      PRINT "1101 + 0000 = ";
+      PROC4bitadd(1,1,0,1, 0,0,0,0, e,d,c,b,a) : PRINT e,d,c,b,a
+      PRINT "1101 + 0001 = ";
+      PROC4bitadd(1,1,0,1, 0,0,0,1, e,d,c,b,a) : PRINT e,d,c,b,a
+      PRINT "1101 + 0010 = ";
+      PROC4bitadd(1,1,0,1, 0,0,1,0, e,d,c,b,a) : PRINT e,d,c,b,a
+      PRINT "1101 + 0011 = ";
+      PROC4bitadd(1,1,0,1, 0,0,1,1, e,d,c,b,a) : PRINT e,d,c,b,a
+      END
+
+      DEF PROC4bitadd(a3&, a2&, a1&, a0&, b3&, b2&, b1&, b0&, \
+      \   RETURN c3&, RETURN s3&, RETURN s2&, RETURN s1&, RETURN s0&)
+      LOCAL c0&, c1&, c2&
+      PROCfulladder(a0&, b0&,   0, s0&, c0&)
+      PROCfulladder(a1&, b1&, c0&, s1&, c1&)
+      PROCfulladder(a2&, b2&, c1&, s2&, c2&)
+      PROCfulladder(a3&, b3&, c2&, s3&, c3&)
+      ENDPROC
+
+      DEF PROCfulladder(a&, b&, c&, RETURN s&, RETURN c1&)
+      LOCAL x&, y&, z&
+      PROChalfadder(a&, c&, x&, y&)
+      PROChalfadder(x&, b&, s&, z&)
+      c1& = y& OR z&
+      ENDPROC
+
+      DEF PROChalfadder(a&, b&, RETURN s&, RETURN c&)
+      s& = FNxorgate(a&, b&)
+      c& = a& AND b&
+      ENDPROC
+
+      DEF FNxorgate(a&, b&)
+      LOCAL c&, d&
+      c& = a& AND NOT b&
+      d& = b& AND NOT a&
+      = c& OR d&

Task/Four-bit-adder/C/four-bit-adder.c

@@ -0,0 +1,70 @@
+#include <stdio.h>
+
+typedef char pin_t;
+#define IN const pin_t *
+#define OUT pin_t *
+#define PIN(X) pin_t _##X; pin_t *X = & _##X;
+#define V(X) (*(X))
+
+/* a NOT that does not soil the rest of the host of the single bit */
+#define NOT(X) (~(X)&1)
+
+/* a shortcut to "implement" a XOR using only NOT, AND and OR gates, as
+   task requirements constrain */
+#define XOR(X,Y) ((NOT(X)&(Y)) | ((X)&NOT(Y)))
+
+void halfadder(IN a, IN b, OUT s, OUT c)
+{
+  V(s) = XOR(V(a), V(b));
+  V(c) = V(a) & V(b);
+}
+
+void fulladder(IN a, IN b, IN ic, OUT s, OUT oc)
+{
+  PIN(ps); PIN(pc); PIN(tc);
+
+  halfadder(/*INPUT*/a, b, /*OUTPUT*/ps, pc);
+  halfadder(/*INPUT*/ps, ic, /*OUTPUT*/s, tc);
+  V(oc) = V(tc) | V(pc);
+}
+
+void fourbitsadder(IN a0, IN a1, IN a2, IN a3,
+		   IN b0, IN b1, IN b2, IN b3,
+		   OUT o0, OUT o1, OUT o2, OUT o3,
+		   OUT overflow)
+{
+  PIN(zero); V(zero) = 0;
+  PIN(tc0); PIN(tc1); PIN(tc2);
+
+  fulladder(/*INPUT*/a0, b0, zero, /*OUTPUT*/o0, tc0);
+  fulladder(/*INPUT*/a1, b1, tc0,  /*OUTPUT*/o1, tc1);
+  fulladder(/*INPUT*/a2, b2, tc1,  /*OUTPUT*/o2, tc2);
+  fulladder(/*INPUT*/a3, b3, tc2,  /*OUTPUT*/o3, overflow);
+}
+
+
+int main()
+{
+  PIN(a0); PIN(a1); PIN(a2); PIN(a3);
+  PIN(b0); PIN(b1); PIN(b2); PIN(b3);
+  PIN(s0); PIN(s1); PIN(s2); PIN(s3);
+  PIN(overflow);
+
+  V(a3) = 0; V(b3) = 1;
+  V(a2) = 0; V(b2) = 1;
+  V(a1) = 1; V(b1) = 1;
+  V(a0) = 0; V(b0) = 0;
+
+  fourbitsadder(a0, a1, a2, a3, /* INPUT */
+		b0, b1, b2, b3,
+		s0, s1, s2, s3, /* OUTPUT */
+		overflow);
+
+  printf("%d%d%d%d + %d%d%d%d = %d%d%d%d, overflow = %d\n",
+	 V(a3), V(a2), V(a1), V(a0),
+	 V(b3), V(b2), V(b1), V(b0),
+	 V(s3), V(s2), V(s1), V(s0),
+	 V(overflow));
+
+  return 0;
+}

Task/Four-bit-adder/Clojure/four-bit-adder-1.clj

@@ -0,0 +1,34 @@
+(ns rosettacode.adder
+  (:use clojure.test))
+
+(defn xor-gate [a b]
+  (or (and a (not b)) (and b (not a))))
+
+(defn half-adder [a b]
+  "output: (S C)"
+  (cons (xor-gate a b) (list (and a b))))
+
+(defn full-adder [a b c]
+  "output: (C S)"
+  (let [HA-ca (half-adder c a)
+        HA-ca->sb (half-adder (first HA-ca) b)]
+    (cons (or (second HA-ca) (second HA-ca->sb))
+          (list (first HA-ca->sb)))))
+
+(defn n-bit-adder
+  "first bits on the list are low order bits
+1 = true
+2 = false true
+3 = true true
+4 = false false true..."
+  can add numbers of different bit-length
+  ([a-bits b-bits] (n-bit-adder a-bits b-bits false))
+  ([a-bits b-bits carry]
+  (let [added (full-adder (first a-bits) (first b-bits) carry)]
+    (if(and (nil? a-bits) (nil? b-bits))
+      (if carry (list carry) '())
+      (cons (second added) (n-bit-adder (next a-bits) (next b-bits) (first added)))))))
+
+;use:
+(n-bit-adder [true true true true true true] [true true true true true true])
+=> (false true true true true true true)

Task/Four-bit-adder/Clojure/four-bit-adder-2.clj

@@ -0,0 +1,51 @@
+(ns rosetta.fourbit)
+
+;; a bit is represented as a boolean (true/false)
+;; a word is a big-endian vector of bits [true false true true] = 11
+;; multiple values are returned as vectors
+
+(defn or-gate [a b]
+  (or a b))
+
+(defn and-gate [a b]
+  (and a b))
+
+(defn not-gate [a]
+  (not a))
+
+(defn xor-gate [a b]
+  (or-gate (and-gate (not-gate a) b) (and-gate a (not-gate b))))
+
+(defn half-adder [a b]
+  "result is [carry sum]"
+  (let [carry (and-gate a b)
+        sum (xor-gate a b)]
+    [carry sum]))
+
+(defn full-adder [a b c0]
+  "result is [carry sum]"
+  (let [[ca sa] (half-adder c0 a)
+        [cb sb] (half-adder sa b)]
+    [(or-gate ca cb) sb]))
+
+(defn nbit-adder [va vb]
+  "va and vb should be big endian bit vectors of the same size. The result
+is a bit vector having one more bit (carry) than args."
+  {:pre [(= (count va) (count vb))]}
+  (let [[c sums] (reduce (fn [[carry sums] [a b]]
+                              (let [[c s] (full-adder a b carry)]
+                                [c (conj sums s)]))
+                         ;; initial value: false carry and an empty list of sums
+                         [false ()]
+                         ;; rseq is constant-time reverse for vectors
+                         (map vector (rseq va) (rseq vb)))]
+    (vec (conj sums c))))
+
+(defn four-bit-adder [a4 a3 a2 a1 b4 b3 b2 b1]
+  "Returns [carry s4 s3 s2 s1]"
+  (nbit-adder [a4 a3 a2 a1] [b4 b3 b2 b1]))
+
+(comment
+(four-bit-adder false true true false  true false true true)
+;; [true false false false true]
+)

Task/Four-bit-adder/CoffeeScript/four-bit-adder.coffee

@@ -0,0 +1,39 @@
+# ATOMIC GATES
+not_gate = (bit) ->
+  [1, 0][bit]
+
+and_gate = (bit1, bit2) ->
+  bit1 and bit2
+
+or_gate = (bit1, bit2) ->
+  bit1 or bit2
+
+# COMPOSED GATES
+xor_gate = (A, B) ->
+  X = and_gate A, not_gate(B)
+  Y = and_gate not_gate(A), B
+  or_gate X, Y
+
+half_adder = (A, B) ->
+  S = xor_gate A, B
+  C = and_gate A, B
+  [S, C]
+
+full_adder = (C0, A, B) ->
+  [SA, CA] = half_adder C0, A
+  [SB, CB] = half_adder SA, B
+  S = SB
+  C = or_gate CA, CB
+  [S, C]
+
+n_bit_adder = (n) ->
+  (A_bits, B_bits) ->
+    s = []
+    C = 0
+    for i in [0...n]
+      [S, C] = full_adder C, A_bits[i], B_bits[i]
+      s.push S
+    [s, C]
+
+adder = n_bit_adder(4)
+console.log adder [1, 0, 1, 0], [0, 1, 1, 0]

Task/Four-bit-adder/D/four-bit-adder.d

@@ -0,0 +1,67 @@
+import std.stdio, std.traits;
+
+void fourBitsAdder(T)(in T a0, in T a1, in T a2, in T a3,
+                      in T b0, in T b1, in T b2, in T b3,
+                      out T o0, out T o1,
+                      out T o2, out T o3,
+                      out T overflow) pure nothrow {
+
+    // A XOR using only NOT, AND and OR, as task requires
+    static T xor(in T x, in T y) pure nothrow {
+        return (~x & y) | (x & ~y);
+    }
+
+    static void halfAdder(in T a, in T b,
+                          out T s, out T c) pure nothrow {
+        s = xor(a, b);
+        // s = a ^ b; // a natural XOR in D
+        c = a & b;
+    }
+
+    static void fullAdder(in T a, in T b, in T ic,
+                          out T s, out T oc) pure nothrow {
+        T ps, pc, tc;
+
+        halfAdder(/*input*/a, b,   /*output*/ps, pc);
+        halfAdder(/*input*/ps, ic, /*output*/s, tc);
+        oc = tc | pc;
+    }
+
+    T zero, tc0, tc1, tc2;
+
+    fullAdder(/*input*/a0, b0, zero, /*output*/o0, tc0);
+    fullAdder(/*input*/a1, b1, tc0,  /*output*/o1, tc1);
+    fullAdder(/*input*/a2, b2, tc1,  /*output*/o2, tc2);
+    fullAdder(/*input*/a3, b3, tc2,  /*output*/o3, overflow);
+}
+
+void main() {
+    alias size_t T;
+    static assert(isUnsigned!T);
+
+    enum T one = T.max,
+           zero = T.min,
+           a0 = zero, a1 = one, a2 = zero, a3 = zero,
+           b0 = zero, b1 = one, b2 = one,  b3 = one;
+    T s0, s1, s2, s3, overflow;
+
+    fourBitsAdder(/*input*/ a0, a1, a2, a3,
+                  /*input*/ b0, b1, b2, b3,
+                  /*output*/s0, s1, s2, s3, overflow);
+
+    writefln("      a3 %032b", a3);
+    writefln("      a2 %032b", a2);
+    writefln("      a1 %032b", a1);
+    writefln("      a0 %032b", a0);
+    writefln("      +");
+    writefln("      b3 %032b", b3);
+    writefln("      b2 %032b", b2);
+    writefln("      b1 %032b", b1);
+    writefln("      b0 %032b", b0);
+    writefln("      =");
+    writefln("      s3 %032b", s3);
+    writefln("      s2 %032b", s2);
+    writefln("      s1 %032b", s1);
+    writefln("      s0 %032b", s0);
+    writefln("overflow %032b", overflow);
+}

Task/Four-bit-adder/Fortran/four-bit-adder.f

@@ -0,0 +1,77 @@
+module logic
+  implicit none
+
+contains
+
+function xor(a, b)
+  logical :: xor
+  logical, intent(in) :: a, b
+
+  xor = (a .and. .not. b) .or. (b .and. .not. a)
+end function xor
+
+function halfadder(a, b, c)
+  logical :: halfadder
+  logical, intent(in)  :: a, b
+  logical, intent(out) :: c
+
+  halfadder = xor(a, b)
+  c = a .and. b
+end function halfadder
+
+function fulladder(a, b, c0, c1)
+  logical :: fulladder
+  logical, intent(in)  :: a, b, c0
+  logical, intent(out) :: c1
+  logical :: c2, c3
+
+  fulladder = halfadder(halfadder(c0, a, c2), b, c3)
+  c1 = c2 .or. c3
+end function fulladder
+
+subroutine fourbitadder(a, b, s)
+  logical, intent(in)  :: a(0:3), b(0:3)
+  logical, intent(out) :: s(0:4)
+  logical :: c0, c1, c2
+
+  s(0) = fulladder(a(0), b(0), .false., c0)
+  s(1) = fulladder(a(1), b(1), c0, c1)
+  s(2) = fulladder(a(2), b(2), c1, c2)
+  s(3) = fulladder(a(3), b(3), c2, s(4))
+end subroutine fourbitadder
+end module
+
+program Four_bit_adder
+  use logic
+  implicit none
+
+  logical, dimension(0:3) :: a, b
+  logical, dimension(0:4) :: s
+  integer, dimension(0:3) :: ai, bi
+  integer, dimension(0:4) :: si
+  integer :: i, j
+
+  do i = 0, 15
+    a(0) = btest(i, 0); a(1) = btest(i, 1); a(2) = btest(i, 2); a(3) = btest(i, 3)
+    where(a)
+      ai = 1
+    else where
+      ai = 0
+    end where
+    do j = 0, 15
+      b(0) = btest(j, 0); b(1) = btest(j, 1); b(2) = btest(j, 2); b(3) = btest(j, 3)
+      where(b)
+        bi = 1
+      else where
+        bi = 0
+      end where
+      call fourbitadder(a, b, s)
+      where (s)
+        si = 1
+      elsewhere
+        si = 0
+      end where
+      write(*, "(4i1,a,4i1,a,5i1)") ai(3:0:-1), " + ", bi(3:0:-1), " = ", si(4:0:-1)
+    end do
+  end do
+end program

Task/Four-bit-adder/Go/four-bit-adder-1.go

@@ -0,0 +1,31 @@
+package main
+
+import "fmt"
+
+func xor(a, b byte) byte {
+    return a&(^b) | b&(^a)
+}
+
+func ha(a, b byte) (s, c byte) {
+    return xor(a, b), a & b
+}
+
+func fa(a, b, c0 byte) (s, c1 byte) {
+    sa, ca := ha(a, c0)
+    s, cb := ha(sa, b)
+    c1 = ca | cb
+    return
+}
+
+func add4(a3, a2, a1, a0, b3, b2, b1, b0 byte) (v, s3, s2, s1, s0 byte) {
+    s0, c0 := fa(a0, b0, 0)
+    s1, c1 := fa(a1, b1, c0)
+    s2, c2 := fa(a2, b2, c1)
+    s3, v = fa(a3, b3, c2)
+    return
+}
+
+func main() {
+    // add 10+9  result should be 1 0 0 1 1
+    fmt.Println(add4(1, 0, 1, 0, 1, 0, 0, 1))
+}

Task/Four-bit-adder/Go/four-bit-adder-2.go

@@ -0,0 +1,129 @@
+package main
+
+import "fmt"
+
+// A wire is modeled as a channel of booleans.
+// You can feed it a single value without blocking.
+// Reading a value blocks until a value is available.
+type Wire chan bool
+func MakeWire() Wire {
+   return make(Wire,1)
+}
+
+// A source for zero values.
+func Zero() Wire {
+   r := MakeWire()
+   go func() {
+      for {
+         r <- false
+      }
+   }()
+   return r
+}
+
+// And gate.
+func And(a,b Wire) Wire {
+   r := MakeWire()
+   go func() {
+      for {
+         x := <-a
+         y := <-b
+         r <- (x && y)
+      }
+   }()
+   return r
+}
+
+// Or gate.
+func Or(a,b Wire) Wire {
+   r := MakeWire()
+   go func() {
+      for {
+         x := <-a
+         y := <-b
+         r <- (x || y)
+      }
+   }()
+   return r
+}
+
+// Not gate.
+func Not(a Wire) Wire {
+   r := MakeWire()
+   go func() {
+      for {
+         x := <-a
+         r <- !x
+      }
+   }()
+   return r
+}
+
+// Split a wire in two.
+func Split(a Wire) (Wire,Wire) {
+   r1 := MakeWire()
+   r2 := MakeWire()
+   go func() {
+      for {
+         x := <-a
+         r1 <- x
+         r2 <- x
+      }
+   }()
+   return r1, r2
+}
+
+// Xor gate, composed of Or, And and Not gates.
+func Xor(a,b Wire) Wire {
+   a1,a2 := Split(a)
+   b1,b2 := Split(b)
+   return Or(And(Not(a1),b1),And(a2,Not(b2)))
+}
+
+// A half adder, composed of two splits and an And and Xor gate.
+func HalfAdder(a,b Wire) (sum,carry Wire) {
+   a1,a2 := Split(a)
+   b1,b2 := Split(b)
+   carry = And(a1,b1)
+   sum = Xor(a2,b2)
+   return
+}
+
+// A full adder, composed of two half adders, and an Or gate.
+func FullAdder(a,b,carryIn Wire) (result,carryOut Wire) {
+   s1,c1 := HalfAdder(carryIn,a)
+   result,c2 := HalfAdder(b,s1)
+   carryOut = Or(c1,c2)
+   return
+}
+
+// A four bit adder, composed of a zero source, and four full adders.
+func FourBitAdder(a1,a2,a3,a4 Wire, b1,b2,b3,b4 Wire) (r1,r2,r3,r4 Wire, carry Wire) {
+   carry = Zero()
+   r1,carry = FullAdder(a1,b1,carry)
+   r2,carry = FullAdder(a2,b2,carry)
+   r3,carry = FullAdder(a3,b3,carry)
+   r4,carry = FullAdder(a4,b4,carry)
+   return
+}
+
+func main() {
+   // Create wires
+   a1 := MakeWire()
+   a2 := MakeWire()
+   a3 := MakeWire()
+   a4 := MakeWire()
+   b1 := MakeWire()
+   b2 := MakeWire()
+   b3 := MakeWire()
+   b4 := MakeWire()
+   // Construct circuit
+   r1,r2,r3,r4, carry := FourBitAdder(a1,a2,a3,a4, b1,b2,b3,b4)
+   // Feed it some values
+   a4 <- false; a3 <- false; a2 <- true; a1 <- false // 0010
+   b4 <- true;  b3 <- true;  b2 <- true; b1 <- false // 1110
+   B := map[bool]int { false: 0, true: 1 }
+   // Read the result
+   fmt.Printf("0010 + 1110 = %d%d%d%d (carry = %d)\n",
+      B[<-r4],B[<-r3],B[<-r2],B[<-r1], B[<-carry])
+}

Task/Four-bit-adder/Haskell/four-bit-adder-1.hs

@@ -0,0 +1,7 @@
+import Control.Arrow
+
+bor, band :: Int -> Int -> Int
+bor = max
+band = min
+bnot :: Int -> Int
+bnot = (1-)

Task/Four-bit-adder/Haskell/four-bit-adder-2.hs

@@ -0,0 +1,3 @@
+nand, xor :: Int -> Int -> Int
+nand = (bnot.).band
+xor a b = uncurry nand. (nand a &&& nand b) $ nand a b

Task/Four-bit-adder/Haskell/four-bit-adder-3.hs

@@ -0,0 +1,4 @@
+halfAdder = uncurry band &&& uncurry xor
+fullAdder (c, a, b) =  (\(cy,s) ->  first (bor cy) $ halfAdder (b, s)) $ halfAdder (c, a)
+
+adder4 as = foldr (\(f,a,b) (cy,bs) -> second(:bs) $ f (cy,a,b)) (0,[]). zip3 (replicate 4 fullAdder) as

Task/Four-bit-adder/Haskell/four-bit-adder-4.hs

@@ -0,0 +1,2 @@
+*Main> adder4 [1,0,1,0] [1,1,1,1]
+(1,[1,0,0,1])

Task/Four-bit-adder/J/four-bit-adder-1.j

@@ -0,0 +1,6 @@
+and=: *.
+or=: +.
+not=: -.
+xor=: (and not) or (and not)~
+hadd=: and ,"0 xor
+add=: ((({.,0:)@[ or {:@[ hadd {.@]), }.@])/@hadd

Task/Four-bit-adder/J/four-bit-adder-2.j

@@ -0,0 +1,2 @@
+   1 1 1 1 add 0 1 1 1
+1 0 1 1 0

Task/Four-bit-adder/J/four-bit-adder-3.j

@@ -0,0 +1 @@
+   add"1/~#:i.16

Task/Four-bit-adder/J/four-bit-adder-4.j

@@ -0,0 +1,17 @@
+   ,"2 ' ',"1 -.&' '@":"1 add"1/~#:i.16
+ 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111
+ 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000
+ 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001
+ 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010
+ 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011
+ 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100
+ 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101
+ 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110
+ 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111
+ 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000
+ 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001
+ 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010
+ 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011
+ 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100
+ 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101
+ 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110

Task/Four-bit-adder/J/four-bit-adder-5.j

@@ -0,0 +1 @@
+add=: ((({.,0:)@[ or {:@[ hadd {.@]), }.@])/@hadd"1

Task/Four-bit-adder/J/four-bit-adder-6.j

@@ -0,0 +1 @@
+   add/~#:i.16

Task/Four-bit-adder/J/four-bit-adder-7.j

@@ -0,0 +1 @@
+   +/~i.10

Task/Four-bit-adder/Java/four-bit-adder.java

@@ -0,0 +1,147 @@
+public class GateLogic
+{
+  // Basic gate interfaces
+  public interface OneInputGate
+  {  boolean eval(boolean input);  }
+
+  public interface TwoInputGate
+  {  boolean eval(boolean input1, boolean input2);  }
+
+  public interface MultiGate
+  {  boolean[] eval(boolean... inputs);  }
+
+  // Create NOT
+  public static OneInputGate NOT = new OneInputGate() {
+    public boolean eval(boolean input)
+    {  return !input;  }
+  };
+
+  // Create AND
+  public static TwoInputGate AND = new TwoInputGate() {
+    public boolean eval(boolean input1, boolean input2)
+    {  return input1 && input2;  }
+  };
+
+  // Create OR
+  public static TwoInputGate OR = new TwoInputGate() {
+    public boolean eval(boolean input1, boolean input2)
+    {  return input1 || input2;  }
+  };
+
+  // Create XOR
+  public static TwoInputGate XOR = new TwoInputGate() {
+    public boolean eval(boolean input1, boolean input2)
+    {
+      return OR.eval(
+               AND.eval(input1, NOT.eval(input2)),
+               AND.eval(NOT.eval(input1), input2)
+             );
+    }
+  };
+
+  // Create HALF_ADDER
+  public static MultiGate HALF_ADDER = new MultiGate() {
+    public boolean[] eval(boolean... inputs)
+    {
+      if (inputs.length != 2)
+        throw new IllegalArgumentException();
+      return new boolean[] {
+        XOR.eval(inputs[0], inputs[1]),  // Output bit
+        AND.eval(inputs[0], inputs[1])   // Carry bit
+      };
+    }
+  };
+
+  // Create FULL_ADDER
+  public static MultiGate FULL_ADDER = new MultiGate() {
+    public boolean[] eval(boolean... inputs)
+    {
+      if (inputs.length != 3)
+        throw new IllegalArgumentException();
+      // Inputs: CarryIn, A, B
+      // Outputs: S, CarryOut
+      boolean[] haOutputs1 = HALF_ADDER.eval(inputs[0], inputs[1]);
+      boolean[] haOutputs2 = HALF_ADDER.eval(haOutputs1[0], inputs[2]);
+      return new boolean[] {
+        haOutputs2[0],                         // Output bit
+        OR.eval(haOutputs1[1], haOutputs2[1])  // Carry bit
+      };
+    }
+  };
+
+  public static MultiGate buildAdder(final int numBits)
+  {
+    return new MultiGate() {
+      public boolean[] eval(boolean... inputs)
+      {
+        // Inputs: A0, A1, A2..., B0, B1, B2...
+        if (inputs.length != (numBits << 1))
+          throw new IllegalArgumentException();
+        boolean[] outputs = new boolean[numBits + 1];
+        boolean[] faInputs = new boolean[3];
+        boolean[] faOutputs = null;
+        for (int i = 0; i < numBits; i++)
+        {
+          faInputs[0] = (faOutputs == null) ? false : faOutputs[1];  // CarryIn
+          faInputs[1] = inputs[i];                                   // Ai
+          faInputs[2] = inputs[numBits + i];                         // Bi
+          faOutputs = FULL_ADDER.eval(faInputs);
+          outputs[i] = faOutputs[0];                                 // Si
+        }
+        if (faOutputs != null)
+          outputs[numBits] = faOutputs[1];                           // CarryOut
+        return outputs;
+      }
+    };
+  }
+
+  public static void main(String[] args)
+  {
+    int numBits = Integer.parseInt(args[0]);
+    int firstNum = Integer.parseInt(args[1]);
+    int secondNum = Integer.parseInt(args[2]);
+    int maxNum = 1 << numBits;
+    if ((firstNum < 0) || (firstNum >= maxNum))
+    {
+      System.out.println("First number is out of range");
+      return;
+    }
+    if ((secondNum < 0) || (secondNum >= maxNum))
+    {
+      System.out.println("Second number is out of range");
+      return;
+    }
+
+    MultiGate multiBitAdder = buildAdder(numBits);
+    // Convert input numbers into array of bits
+    boolean[] inputs = new boolean[numBits << 1];
+    String firstNumDisplay = "";
+    String secondNumDisplay = "";
+    for (int i = 0; i < numBits; i++)
+    {
+      boolean firstBit = ((firstNum >>> i) & 1) == 1;
+      boolean secondBit = ((secondNum >>> i) & 1) == 1;
+      inputs[i] = firstBit;
+      inputs[numBits + i] = secondBit;
+      firstNumDisplay = (firstBit ? "1" : "0") + firstNumDisplay;
+      secondNumDisplay = (secondBit ? "1" : "0") + secondNumDisplay;
+    }
+
+    boolean[] outputs = multiBitAdder.eval(inputs);
+    int outputNum = 0;
+    String outputNumDisplay = "";
+    String outputCarryDisplay = null;
+    for (int i = numBits; i >= 0; i--)
+    {
+      outputNum = (outputNum << 1) | (outputs[i] ? 1 : 0);
+      if (i == numBits)
+        outputCarryDisplay = outputs[i] ? "1" : "0";
+      else
+        outputNumDisplay += (outputs[i] ? "1" : "0");
+    }
+    System.out.println("numBits=" + numBits);
+    System.out.println("A=" + firstNumDisplay + " (" + firstNum + "), B=" + secondNumDisplay + " (" + secondNum + "), S=" + outputCarryDisplay + " " + outputNumDisplay + " (" + outputNum + ")");
+    return;
+  }
+
+}

Task/Four-bit-adder/JavaScript/four-bit-adder-1.js

@@ -0,0 +1,14 @@
+function acceptedBinFormat(bin) {
+    if (bin == 1 || bin === 0 || bin === '0')
+        return true;
+    else
+        return bin;
+}
+
+function arePseudoBin() {
+    var args = [].slice.call(arguments), len = args.length;
+    while(len--)
+        if (acceptedBinFormat(args[len]) !== true)
+            throw new Error('argument must be 0, \'0\', 1, or \'1\', argument ' + len + ' was ' + args[len]);
+    return true;
+}

Task/Four-bit-adder/JavaScript/four-bit-adder-2.js

@@ -0,0 +1,72 @@
+// basic building blocks allowed by the rules are ~, &, and |, we'll fake these
+// in a way that makes what they do (at least when you use them) more obvious
+// than the other available options do.
+
+function not(a) {
+    if (arePseudoBin(a))
+        return a == 1 ? 0 : 1;
+}
+
+function and(a, b) {
+    if (arePseudoBin(a, b))
+        return a + b < 2 ? 0 : 1;
+}
+
+function nand(a, b) {
+    if (arePseudoBin(a, b))
+        return not(and(a, b));
+}
+
+function or(a, b) {
+    if (arePseudoBin(a, b))
+        return nand(nand(a,a), nand(b,b));
+}
+
+function xor(a, b) {
+    if (arePseudoBin(a, b))
+        return nand(nand(nand(a,b), a), nand(nand(a,b), b));
+}
+
+function halfAdder(a, b) {
+    if (arePseudoBin(a, b))
+        return { carry: and(a, b), sum: xor(a, b) };
+}
+
+function fullAdder(a, b, c) {
+    if (arePseudoBin(a, b, c)) {
+        var h0 = halfAdder(a, b),
+            h1 = halfAdder(h0.sum, c);
+        return {carry: or(h0.carry, h1.carry), sum: h1.sum };
+    }
+}
+
+function fourBitAdder(a, b) {
+    if (typeof a.length == 'undefined' || typeof b.length == 'undefined')
+        throw new Error('bad values');
+    // not sure if the rules allow this, but we need to pad the values
+    // if they're too short and trim them if they're too long
+    var inA = Array(4),
+        inB = Array(4),
+        out = Array(4),
+        i = 4,
+        pass;
+
+    while (i--) {
+        inA[i] = a[i] != 1 ? 0 : 1;
+        inB[i] = b[i] != 1 ? 0 : 1;
+    }
+
+    // now we can start adding... I'd prefer to do this in a loop,
+    // but that wouldn't be "connecting the other 'constructive blocks',
+    // in turn made of 'simpler' and 'smaller' ones"
+
+    pass = halfAdder(inA[3], inB[3]);
+    out[3] = pass.sum;
+    pass = fullAdder(inA[2], inB[2], pass.carry);
+    out[2] = pass.sum;
+    pass = fullAdder(inA[1], inB[1], pass.carry);
+    out[1] = pass.sum;
+    pass = fullAdder(inA[0], inB[0], pass.carry);
+    out[0] = pass.sum;
+    return out.join('');
+}

Task/Four-bit-adder/JavaScript/four-bit-adder-3.js

@@ -0,0 +1 @@
+fourBitAdder('1010', '0101'); // 1111 (15)

Task/Four-bit-adder/JavaScript/four-bit-adder-4.js

@@ -0,0 +1,11 @@
+// run this in your browsers console
+var outer = inner = 16, a, b;
+
+while(outer--) {
+    a = (8|outer).toString(2);
+    while(inner--) {
+        b = (8|inner).toString(2);
+        console.log(a + ' + ' + b + ' = ' + fourBitAdder(a, b));
+    }
+    inner = outer;
+}

Task/Four-bit-adder/MATLAB/four-bit-adder-1.m

@@ -0,0 +1,64 @@
+function [S,v] = fourBitAdder(input1,input2)
+
+    %Make sure that only 4-Bit numbers are being added. This assumes that
+    %if input1 and input2 are a vector of multiple decimal numbers, then
+    %the binary form of these vectors are an n by 4 matrix.
+    assert((size(input1,2) == 4) && (size(input2,2) == 4),'This will only work on 4-Bit Numbers');
+
+    %Converts MATLAB binary strings to matricies of 1 and 0
+    function mat = binStr2Mat(binStr)
+        mat = zeros(size(binStr));
+        for i = (1:numel(binStr))
+            mat(i) = str2double(binStr(i));
+        end
+    end
+
+    %XOR decleration
+    function AxorB = xor(A,B)
+        AxorB = or(and(A,not(B)),and(B,not(A)));
+    end
+
+    %Half-Adder decleration
+    function [S,C] = halfAdder(A,B)
+        S = xor(A,B);
+        C = and(A,B);
+    end
+
+    %Full-Adder decleration
+    function [S,Co] = fullAdder(A,B,Ci)
+       [SAdder1,CAdder1] = halfAdder(Ci,A);
+       [S,CAdder2] = halfAdder(SAdder1,B);
+       Co = or(CAdder1,CAdder2);
+    end
+
+    %The rest of this code is the 4-bit adder
+
+    binStrFlag = false; %A flag to determine if the original input was a binary string
+
+    %If either of the inputs was a binary string, convert it to a matrix of
+    %1's and 0's.
+    if ischar(input1)
+       input1 = binStr2Mat(input1);
+       binStrFlag = true;
+    end
+    if ischar(input2)
+       input2 = binStr2Mat(input2);
+       binStrFlag = true;
+    end
+
+    %This does the addition
+    S = zeros(size(input1));
+
+    [S(:,4),Co] = fullAdder(input1(:,4),input2(:,4),0);
+    [S(:,3),Co] = fullAdder(input1(:,3),input2(:,3),Co);
+    [S(:,2),Co] = fullAdder(input1(:,2),input2(:,2),Co);
+    [S(:,1),v] = fullAdder(input1(:,1),input2(:,1),Co);
+
+    %If the original inputs were binary strings, convert the output of the
+    %4-bit adder to a binary string with the same formatting as the
+    %original binary strings.
+    if binStrFlag
+        S = num2str(S);
+        v = num2str(v);
+    end
+end %fourBitAdder

Task/Four-bit-adder/MATLAB/four-bit-adder-2.m

@@ -0,0 +1,54 @@
+>> [S,V] = fourBitAdder([0 0 0 1],[1 1 1 1])
+
+S =
+
+     0     0     0     0
+
+
+V =
+
+     1
+
+>> [S,V] = fourBitAdder([0 0 0 1;0 0 1 0],[0 0 0 1;0 0 0 1])
+
+S =
+
+     0     0     1     0
+     0     0     1     1
+
+
+V =
+
+     0
+     0
+
+>> [S,V] = fourBitAdder(dec2bin(10,4),dec2bin(1,4))
+
+S =
+
+1  0  1  1
+
+
+V =
+
+0
+
+>> [S,V] = fourBitAdder(dec2bin([10 11],4),dec2bin([1 1],4))
+
+S =
+
+1  0  1  1
+1  1  0  0
+
+
+V =
+
+0
+0
+
+>> bin2dec(S)
+
+ans =
+
+    11
+    12

Task/Four-bit-adder/MUMPS/four-bit-adder.mumps

@@ -0,0 +1,14 @@
+XOR(Y,Z) ;Uses logicals - i.e., 0 is false, anything else is true (1 is used if setting a value)
+ QUIT (Y&'Z)!('Y&Z)
+HALF(W,X)
+ QUIT $$XOR(W,X)_"^"_(W&X)
+FULL(U,V,CF)
+ NEW F1,F2
+ S F1=$$HALF(U,V)
+ S F2=$$HALF($P(F1,"^",1),CF)
+ QUIT $P(F2,"^",1)_"^"_($P(F1,"^",2)!($P(F2,"^",2)))
+FOUR(Y,Z,C4)
+ NEW S,I,T
+ FOR I=4:-1:1 SET T=$$FULL($E(Y,I),$E(Z,I),C4),$E(S,I)=$P(T,"^",1),C4=$P(T,"^",2)
+ K I,T
+ QUIT S_"^"_C4

Task/Four-bit-adder/Mathematica/four-bit-adder-1.mathematica

@@ -0,0 +1,16 @@
+and[a_, b_] := Max[a, b];
+or[a_, b_] := Min[a, b];
+not[a_] := 1 - a;
+xor[a_, b_] := or[and[a, not[b]], and[b, not[a]]];
+halfadder[a_, b_] := {xor[a, b], and[a, b]};
+fulladder[a_, b_, c0_] := Module[{s, c, c1},
+   {s, c} = halfadder[c0, a];
+   {s, c1} = halfadder[s, b];
+   {s, or[c, c1]}];
+fourbitadder[{a3_, a2_, a1_, a0_}, {b3_, b2_, b1_, b0_}] :=
+  Module[{s0, s1, s2, s3, c0, c1, c2, c3},
+   {s0, c0} = fulladder[a0, b0, 0];
+   {s1, c1} = fulladder[a1, b1, c0];
+   {s2, c2} = fulladder[a2, b2, c1];
+   {s3, c3} = fulladder[a3, b3, c2];
+   {{s3, s2, s1, s0}, c3}];

Task/Four-bit-adder/Mathematica/four-bit-adder-2.mathematica

@@ -0,0 +1 @@
+fourbitadder[{1, 0, 1, 0}, {1, 1, 1, 1}]

Task/Four-bit-adder/PicoLisp/four-bit-adder.l

@@ -0,0 +1,23 @@
+(de halfAdder (A B)  #> (Carry . Sum)
+   (cons
+      (and A B)
+      (xor A B) ) )
+
+(de fullAdder (A B C)  #> (Carry . Sum)
+   (let (Ha1 (halfAdder C A)  Ha2 (halfAdder (cdr Ha1) B))
+      (cons
+         (or (car Ha1) (car Ha2))
+         (cdr Ha2) ) ) )
+
+(de 4bitsAdder (A4 A3 A2 A1  B4 B3 B2 B1)  #> (V S4 S3 S2 S1)
+   (let
+      (Fa1 (fullAdder A1 B1)
+         Fa2 (fullAdder A2 B2 (car Fa1))
+         Fa3 (fullAdder A3 B3 (car Fa2))
+         Fa4 (fullAdder A4 B4 (car Fa3)) )
+      (list
+         (car Fa4)
+         (cdr Fa4)
+         (cdr Fa3)
+         (cdr Fa2)
+         (cdr Fa1) ) ) )

Task/Four-bit-adder/Python/four-bit-adder.py

@@ -0,0 +1,35 @@
+def xor(a, b): return (a and not b) or (b and not a)
+
+def ha(a, b): return xor(a, b), a and b     # sum, carry
+
+def fa(a, b, ci):
+    s0, c0 = ha(ci, a)
+    s1, c1 = ha(s0, b)
+    return s1, c0 or c1     # sum, carry
+
+def fa4(a, b):
+    width = 4
+    ci = [None] * width
+    co = [None] * width
+    s  = [None] * width
+    for i in range(width):
+        s[i], co[i] = fa(a[i], b[i], co[i-1] if i else 0)
+    return s, co[-1]
+
+def int2bus(n, width=4):
+    return [int(c) for c in "{0:0{1}b}".format(n, width)[::-1]]
+
+def bus2int(b):
+    return sum(1 << i for i, bit in enumerate(b) if bit)
+
+def test_fa4():
+    width = 4
+    tot = [None] * (width + 1)
+    for a in range(2**width):
+        for b in range(2**width):
+            tot[:width], tot[width] = fa4(int2bus(a), int2bus(b))
+            assert a + b == bus2int(tot), "totals don't match: %i + %i != %s" % (a, b, tot)
+
+
+if __name__ == '__main__':
+   test_fa4()

Task/Four-bit-adder/REXX/four-bit-adder.rexx

@@ -0,0 +1,35 @@
+/*REXX program shows (all) the sums of a full 4-bit adder  (with carry).*/
+call hdr1;  call hdr2
+
+   do j=0  for 16
+                              do m=0  for 4;   a.m=bit(j,m);   end
+      do k=0  for 16
+                              do m=0  for 4;   b.m=bit(k,m);   end
+      sc=4bitAdder(a.,b.)
+      z=a.3 a.2 a.1 a.0 '_+_' b.3 b.2 b.1 b.0 '_=_' sc ',' s.3 s.2 s.1 s.0
+      say translate(space(z,0),,'_')
+      end   /*k*/
+   end      /*j*/
+
+call hdr2;  call hdr1
+exit                                   /*stick a fork in it, we're done.*/
+
+/*──────────────────────────────────subroutines/functions───────────────*/
+hdr1:      say 'aaaa + bbbb = c, sum     [c=carry]';   return
+hdr2:      say '════   ════   ══════'              ;   return
+bit:       procedure;  arg x,y;  return substr(reverse(x2b(d2x(x))),y+1,1)
+
+/*──────────────────────────────────HALFADDER subroutine-───────────────*/
+halfAdder: procedure expose c;  parse arg x,y;   c=x & y;   return x && y
+
+/*──────────────────────────────────FULLADDER subroutine-───────────────*/
+fullAdder: procedure expose c;  parse arg x,y,fc
+_1=halfAdder(fc,x);  c1=c
+_2=halfAdder(_1,y);  c=c | c1;  return _2
+
+/*──────────────────────────────────3BITADDER subroutine-───────────────*/
+4bitAdder: procedure expose s. a. b.;  carry.=0
+                    do j=0 for 4;      n=j-1
+                    s.j=fullAdder(a.j, b.j, carry.n);   carry.j=c
+                    end   /*j*/
+return c

Task/Four-bit-adder/Ruby/four-bit-adder.rb

@@ -0,0 +1,55 @@
+# returns pair [sum, carry]
+def four_bit_adder(a, b)
+  a_bits = binary_string_to_bits(a,4)
+  b_bits = binary_string_to_bits(b,4)
+
+  s0, c0 = full_adder(a_bits[0], b_bits[0],  0)
+  s1, c1 = full_adder(a_bits[1], b_bits[1], c0)
+  s2, c2 = full_adder(a_bits[2], b_bits[2], c1)
+  s3, c3 = full_adder(a_bits[3], b_bits[3], c2)
+
+  [bits_to_binary_string([s0, s1, s2, s3]), c3.to_s]
+end
+
+# returns pair [sum, carry]
+def full_adder(a, b, c0)
+  s, c = half_adder(c0, a)
+  s, c1 = half_adder(s, b)
+  [s, _or(c,c1)]
+end
+
+# returns pair [sum, carry]
+def half_adder(a, b)
+  [xor(a, b), _and(a,b)]
+end
+
+def xor(a, b)
+  _or(_and(a, _not(b)), _and(_not(a), b))
+end
+
+# "and", "or" and "not" are Ruby keywords
+def _and(a, b); a & b; end
+def _or(a, b);  a | b; end
+def _not(a);   ~a & 1; end
+
+def int_to_binary_string(n, length)
+  ("0"*length + n.to_s(2))[-length .. -1]
+end
+def binary_string_to_bits(s, length)
+  (s.reverse + "0"*length)[0..length-1].chars.map(&:to_i)
+end
+def bits_to_binary_string(bits)
+  bits.map(&:to_s).reverse.join("")
+end
+
+puts " A    B      A      B   C    S  sum"
+0.upto(15) do |a|
+  0.upto(15) do |b|
+    bin_a = int_to_binary_string(a, 4)
+    bin_b = int_to_binary_string(b, 4)
+    sum, carry = four_bit_adder(bin_a, bin_b)
+    puts "%2d + %2d = %s + %s = %s %s = %2d" % [
+      a, b, bin_a, bin_b, carry, sum, (carry + sum).to_i(2)
+    ]
+  end
+end

Task/Four-bit-adder/Sather/four-bit-adder.sa

@@ -0,0 +1,138 @@
+-- a "pin" can be connected only to one component
+-- that "sets" it to 0 or 1, while it can be "read"
+-- ad libitum. (Tristate logic is not taken into account)
+-- This class does the proper checking, assuring the "circuit"
+-- and the connections are described correctly. Currently can make
+-- hard the implementation of a latch
+class PIN is
+  private attr v:INT;
+  readonly attr name:STR;
+  private attr connected:BOOL;
+
+  create(n:STR):SAME is -- n = conventional name for this "pin"
+    res ::= new;
+    res.name := n;
+    res.connected := false;
+    return res;
+  end;
+
+  val:INT is
+    if self.connected.not then
+       #ERR + "pin " + self.name + " is undefined\n";
+       return 0; -- could return a random bit to "simulate" undefined
+                 -- behaviour
+    else
+       return self.v;
+    end;
+  end;
+
+  -- connect ...
+  val(v:INT) is
+    if self.connected then
+       #ERR + "pin " + self.name + " is already 'assigned'\n";
+    else
+       self.connected := true;
+       self.v := v.band(1);
+    end;
+  end;
+
+  -- connect to existing pin
+  val(v:PIN) is
+     self.val(v.val);
+  end;
+end;
+
+-- XOR "block"
+class XOR is
+  readonly attr xor :PIN;
+
+  create(a, b:PIN):SAME is
+    res ::= new;
+    res.xor := #PIN("xor output");
+    l   ::= a.val.bnot.band(1).band(b.val);
+    r   ::= a.val.band(b.val.bnot.band(1));
+    res.xor.val := r.bor(l);
+    return res;
+  end;
+end;
+
+-- HALF ADDER "block"
+class HALFADDER is
+  readonly attr s, c:PIN;
+
+  create(a, b:PIN):SAME is
+    res ::= new;
+    res.s := #PIN("halfadder sum output");
+    res.c := #PIN("halfadder carry output");
+    res.s.val := #XOR(a, b).xor.val;
+    res.c.val := a.val.band(b.val);
+    return res;
+  end;
+end;
+
+-- FULL ADDER "block"
+class FULLADDER is
+  readonly attr s, c:PIN;
+
+  create(a, b, ic:PIN):SAME is
+    res ::= new;
+    res.s := #PIN("fulladder sum output");
+    res.c := #PIN("fulladder carry output");
+    halfadder1 ::= #HALFADDER(a, b);
+    halfadder2 ::= #HALFADDER(halfadder1.s, ic);
+    res.s.val := halfadder2.s;
+    res.c.val := halfadder2.c.val.bor(halfadder1.c.val);
+    return res;
+  end;
+end;
+
+-- FOUR BITS ADDER "block"
+class FOURBITSADDER is
+  readonly attr s0, s1, s2, s3, v :PIN;
+
+  create(a0, a1, a2, a3, b0, b1, b2, b3:PIN):SAME is
+    res ::= new;
+    res.s0  := #PIN("4-bits-adder sum outbut line 0");
+    res.s1  := #PIN("4-bits-adder sum outbut line 1");
+    res.s2  := #PIN("4-bits-adder sum outbut line 2");
+    res.s3  := #PIN("4-bits-adder sum outbut line 3");
+    res.v   := #PIN("4-bits-adder overflow output");
+    zero ::= #PIN("zero/mass pin");
+    zero.val := 0;
+    fa0 ::= #FULLADDER(a0, b0, zero);
+    fa1 ::= #FULLADDER(a1, b1, fa0.c);
+    fa2 ::= #FULLADDER(a2, b2, fa1.c);
+    fa3 ::= #FULLADDER(a3, b3, fa2.c);
+    res.v.val  := fa3.c;
+    res.s0.val := fa0.s;
+    res.s1.val := fa1.s;
+    res.s2.val := fa2.s;
+    res.s3.val := fa3.s;
+    return res;
+  end;
+end;
+
+-- testing --
+
+class MAIN is
+  main is
+    a0 ::= #PIN("a0 in"); b0 ::= #PIN("b0 in");
+    a1 ::= #PIN("a1 in"); b1 ::= #PIN("b1 in");
+    a2 ::= #PIN("a2 in"); b2 ::= #PIN("b2 in");
+    a3 ::= #PIN("a3 in"); b3 ::= #PIN("b3 in");
+    ov ::= #PIN("overflow");
+
+    a0.val := 1; b0.val := 1;
+    a1.val := 1; b1.val := 1;
+    a2.val := 0; b2.val := 0;
+    a3.val := 0; b3.val := 1;
+
+    fba ::= #FOURBITSADDER(a0,a1,a2,a3,b0,b1,b2,b3);
+    #OUT + #FMT("%d%d%d%d", a3.val, a2.val, a1.val, a0.val) +
+    	   " + " +
+           #FMT("%d%d%d%d", b3.val, b2.val, b1.val, b0.val) +
+           " = " +
+           #FMT("%d%d%d%d", fba.s3.val, fba.s2.val, fba.s1.val, fba.s0.val) +
+           ", overflow = " + fba.v.val + "\n";
+  end;
+end;

Task/Four-bit-adder/Scala/four-bit-adder-1.scala

@@ -0,0 +1,26 @@
+object FourBitAdder {
+   type Nibble=(Boolean, Boolean, Boolean, Boolean)
+
+   def xor(a:Boolean, b:Boolean)=(!a)&&b || a&&(!b)
+
+   def halfAdder(a:Boolean, b:Boolean)={
+      val s=xor(a,b)
+      val c=a && b
+      (s, c)
+   }
+
+   def fullAdder(a:Boolean, b:Boolean, cIn:Boolean)={
+      val (s1, c1)=halfAdder(a, cIn)
+      val (s, c2)=halfAdder(s1, b)
+      val cOut=c1 || c2
+      (s, cOut)
+   }
+
+   def fourBitAdder(a:Nibble, b:Nibble)={
+      val (s0, c0)=fullAdder(a._4, b._4, false)
+      val (s1, c1)=fullAdder(a._3, b._3, c0)
+      val (s2, c2)=fullAdder(a._2, b._2, c1)
+      val (s3, cOut)=fullAdder(a._1, b._1, c2)
+      ((s3, s2, s1, s0), cOut)
+   }
+}

Task/Four-bit-adder/Scala/four-bit-adder-2.scala

@@ -0,0 +1,15 @@
+object FourBitAdderTest {
+   import FourBitAdder._
+   def main(args: Array[String]): Unit = {
+      println("%4s   %4s   %4s %2s".format("A","B","S","C"))
+      for(a <- 0 to 15; b <- 0 to 15){
+         val (s, cOut)=fourBitAdder(a,b)
+         println("%4s + %4s = %4s %2d".format(nibbleToString(a),nibbleToString(b),nibbleToString(s),cOut.toInt))
+      }
+   }
+
+   implicit def toInt(b:Boolean):Int=if (b) 1 else 0
+   implicit def intToBool(i:Int):Boolean=if (i==0) false else true
+   implicit def intToNibble(i:Int):Nibble=((i>>>3)&1, (i>>>2)&1, (i>>>1)&1, i&1)
+   def nibbleToString(n:Nibble):String="%d%d%d%d".format(n._1.toInt, n._2.toInt, n._3.toInt, n._4.toInt)
+}

Task/Four-bit-adder/Tcl/four-bit-adder-1.tcl

@@ -0,0 +1,65 @@
+package require Tcl 8.5
+
+# Create our little language
+proc pins args {
+    # Just declaration...
+    foreach p $args {upvar 1 $p v}
+}
+proc gate {name pins body} {
+    foreach p $pins {
+	lappend args _$p
+	append v " \$_$p $p"
+    }
+    proc $name $args "upvar 1 $v;$body"
+}
+
+# Fundamental gates; these are the only ones that use Tcl math ops
+gate not {x out}   {
+    set out [expr {1 & ~$x}]
+}
+gate and {x y out} {
+    set out [expr {$x & $y}]
+}
+gate or  {x y out} {
+    set out [expr {$x | $y}]
+}
+gate GND pin {
+    set pin 0
+}
+
+# Composite gates: XOR
+gate xor {x y out} {
+    pins nx ny x_ny nx_y
+
+    not x          nx
+    not y          ny
+    and x ny       x_ny
+    and nx y       nx_y
+    or  x_ny nx_y  out
+}
+
+# Composite gates: half adder
+gate halfadd {a b sum carry} {
+    xor a b  sum
+    and a b  carry
+}
+
+# Composite gates: full adder
+gate fulladd {a b c0 sum c1} {
+    pins sum_ac carry_ac carry_sb
+
+    halfadd c0 a          sum_ac carry_ac
+    halfadd sum_ac b      sum carry_sb
+    or carry_ac carry_sb  c1
+}
+
+# Composite gates: 4-bit adder
+gate 4add {a0 a1 a2 a3  b0 b1 b2 b3  s0 s1 s2 s3  v} {
+    pins c0 c1 c2 c3
+
+    GND c0
+    fulladd a0 b0 c0  s0 c1
+    fulladd a1 b1 c1  s1 c2
+    fulladd a2 b2 c2  s2 c3
+    fulladd a3 b3 c3  s3 v
+}

Task/Four-bit-adder/Tcl/four-bit-adder-2.tcl

@@ -0,0 +1,13 @@
+# Simple driver for the circuit
+proc 4add_driver {a b} {
+    lassign [split $a {}] a3 a2 a1 a0
+    lassign [split $b {}] b3 b2 b1 b0
+    lassign [split 00000 {}] s3 s2 s1 s0 v
+
+    4add a0 a1 a2 a3  b0 b1 b2 b3  s0 s1 s2 s3  v
+
+    return "$s3$s2$s1$s0 overflow=$v"
+}
+set a 1011
+set b 0110
+puts $a+$b=[4add_driver $a $b]