2016 Update

This commit is contained in:
Tina Müller 2016-12-05 22:15:40 +01:00
parent 948b86eafa
commit dcf5d15da3
7965 changed files with 139854 additions and 31002 deletions

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@ -0,0 +1,19 @@
* Do-While
DOWHILE CSECT
USING DOWHILE,12 set base register
LR 12,15 load base register
SR 6,6 v=0
LOOP LA 6,1(6) repeat; v=v+1
STC 6,WTOTXT v
OI WTOTXT,X'F0' make printable
WTO MF=(E,WTOMSG) display v
LR 4,6 v
SRDA 4,32 shift to reg 5
D 4,=F'6' v/6 so r4=remain & r5=quotient
LTR 4,4 until v mod 6=0
BNZ LOOP loop
ENDLOOP BR 14 return to caller
WTOMSG DS 0F full word alignment for wto
WTOLEN DC AL2(5),H'0' length of wto buffer (4+1)
WTOTXT DC C' ' wto text
END DOWHILE

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* Do-While 27/06/2016
DOWHILE CSECT
USING DOWHILE,12 set base register
LR 12,15 init base register
SR 6,6 v=0
LA 4,1 init reg 4
DO UNTIL=(LTR,4,Z,4) do until v mod 6=0
LA 6,1(6) v=v+1
STC 6,WTOTXT v
OI WTOTXT,X'F0' make editable
WTO MF=(E,WTOMSG) display v
LR 4,6 v
SRDA 4,32 shift dividend to reg 5
D 4,=F'6' v/6 so r4=remain & r5=quotient
ENDDO , end do
BR 14 return to caller
WTOMSG DS 0F full word alignment for wto
WTOLEN DC AL2(L'WTOTXT+4) length of WTO buffer
DC H'0' must be zero
WTOTXT DS C one char
END DOWHILE

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@ -1,26 +0,0 @@
DOWHILE CSECT , -This program's control section
BAKR 14,0 -Caller's registers to linkage stack
LR 12,15 -load entry point address into Reg 12
USING DOWHILE,12 -tell assembler we use Reg 12 as base
XR 9,9 -clear Reg 9 - divident value
LA 6,6 -load divisor value 6 in Reg 6
LA 8,WTOLEN -address of WTO area in Reg 8
LOOP DS 0H
LA 9,1(,9) -add 1 to divident Reg 9
ST 9,FW2 -store it
LM 4,5,FDOUBLE -load into even/odd register pair
STH 9,WTOTXT -store divident in text area
MVI WTOTXT,X'F0' -first of two bytes zero
OI WTOTXT+1,X'F0' -make second byte printable
WTO TEXT=(8) -print it (Write To Operator macro)
DR 4,6 -divide Reg pair 4,5 by Reg 6
LTR 5,5 -test quotient (remainder in Reg 4)
BNZ RETURN -if one: 6 iterations, exit loop.
B LOOP -if zero: loop again.
RETURN PR , -return to caller.
FDOUBLE DC 0FD
DC F'0'
FW2 DC F'0'
WTOLEN DC H'2' -fixed WTO length of two
WTOTXT DC CL2' '
END DOWHILE

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@ -1,5 +1,5 @@
(setq val 0)
(loop do
(incf val)
(print val)
while (/= 0 (mod val 6)))
(let ((val 0))
(loop do
(incf val)
(print val)
while (/= 0 (mod val 6))))

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@ -0,0 +1,6 @@
n = 0
do
{
n = n + 1
println[n]
} while n mod 6 != 0

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@ -3,11 +3,9 @@ package main
import "fmt"
func main() {
for value := 0;; {
value++
fmt.Println(value)
if value % 6 == 0 {
break
}
}
var value int
for ok := true; ok; ok = value%6 != 0 {
value++
fmt.Println(value)
}
}

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(() => {
'use strict';
// unfoldr :: (b -> Maybe (a, b)) -> b -> [a]
function unfoldr(mf, v) {
for (var lst = [], a = v, m;
(m = mf(a)) && m.valid;) {
lst.push(m.value), a = m.new;
}
return lst;
}
// until :: (a -> Bool) -> (a -> a) -> a -> a
function until(p, f, x) {
let v = x;
while(!p(v)) v = f(v);
return v;
}
let result1 = unfoldr(
x => {
return {
value: x,
valid: (x % 6) !== 0,
new: x + 1
}
},
1
);
let result2 = until(
m => (m.n % 6) === 0,
m => {
return {
n : m.n + 1,
xs : m.xs.concat(m.n)
};
},
{
n: 1,
xs: []
}
).xs;
return [result1, result2];
})();

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@ -0,0 +1 @@
[[1, 2, 3, 4, 5], [1, 2, 3, 4, 5]]

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@ -0,0 +1,14 @@
julia> i = 0
0
julia> while true
println(i)
i += 1
i % 6 == 0 || break
end
0
1
2
3
4
5

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julia> @eval macro $(:do)(block, when::Symbol, condition)
when ≠ :when && error("@do expected `when` got `$s`")
quote
let
$block
while $condition
$block
end
end
end |> esc
end
@do (macro with 1 method)
julia> i = 0
0
julia> @do begin
@show i
i += 1
end when i % 6 ≠ 0
i = 0
i = 1
i = 2
i = 3
i = 4
i = 5

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@ -0,0 +1,25 @@
julia> macro do_while(condition, block)
quote
let
$block
while $condition
$block
end
end
end |> esc
end
@do_while (macro with 1 method)
julia> i = 0
0
julia> @do_while i % 6 ≠ 0 begin
@show i
i += 1
end
i = 0
i = 1
i = 2
i = 3
i = 4
i = 5

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@ -1,8 +0,0 @@
i = 0
while true
println(i)
i += 1
if i%6 == 0
break
end
end

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.text
main: li $s0, 0 # start at 0.
li $s1, 6
loop: addi $s0, $s0, 1 # add 1 to $s0
div $s0, $s1 # divide $s0 by $s1. Result is in the multiplication/division registers
mfhi $s3 # copy the remainder from the higher multiplication register to $s3
move $a0, $s0 # variable must be in $a0 to print
li $v0, 1 # 1 must be in $v0 to tell the assembler to print an integer
syscall # print the integer in $a0
bnez $s3, loop # if $s3 is not 0, jump to loop
li $v0, 10
syscall # syscall to end the program

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@ -2,7 +2,7 @@
data _null_;
n=0;
do until(mod(n,6)=0);
n=n+1;
put n;
n+1;
put n;
end;
run;

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@ -0,0 +1,4 @@
for ((val=1;;val++)) {
print $val
(( val % 6 )) || break
}