Initial data commit
This commit is contained in:
parent
72d218235f
commit
f23f22d71c
199087 changed files with 3378941 additions and 0 deletions
27
Task/Loops-Do-while/360-Assembly/loops-do-while-1.360
Normal file
27
Task/Loops-Do-while/360-Assembly/loops-do-while-1.360
Normal file
|
|
@ -0,0 +1,27 @@
|
|||
* Do-While
|
||||
DOWHILE CSECT , This program's control section
|
||||
BAKR 14,0 Caller's registers to linkage stack
|
||||
LR 12,15 load entry point address into Reg 12
|
||||
USING DOWHILE,12 tell assembler we use Reg 12 as base
|
||||
XR 9,9 clear Reg 9 - divident value
|
||||
LA 6,6 load divisor value 6 in Reg 6
|
||||
LA 8,WTOLEN address of WTO area in Reg 8
|
||||
LOOP DS 0H
|
||||
LA 9,1(,9) add 1 to divident Reg 9
|
||||
ST 9,FW2 store it
|
||||
LM 4,5,FDOUBLE load into even/odd register pair
|
||||
STH 9,WTOTXT store divident in text area
|
||||
MVI WTOTXT,X'F0' first of two bytes zero
|
||||
OI WTOTXT+1,X'F0' make second byte printable
|
||||
WTO TEXT=(8) print it (Write To Operator macro)
|
||||
DR 4,6 divide Reg pair 4,5 by Reg 6
|
||||
LTR 5,5 test quotient (remainder in Reg 4)
|
||||
BNZ RETURN if one: 6 iterations, exit loop.
|
||||
B LOOP if zero: loop again.
|
||||
RETURN PR , return to caller.
|
||||
FDOUBLE DC 0FD
|
||||
DC F'0'
|
||||
FW2 DC F'0'
|
||||
WTOLEN DC H'2' fixed WTO length of two
|
||||
WTOTXT DC CL2' '
|
||||
END DOWHILE
|
||||
Loading…
Add table
Add a link
Reference in a new issue