/* ARM assembly AARCH64 Raspberry PI 3B */ /* program bitwise64.s */ /************************************/ /* Constantes */ /************************************/ /* for this file see task include a file in language AArch64 assembly*/ .include "../includeConstantesARM64.inc" /************************************/ /* Initialized data */ /************************************/ .data szMessResultAnd: .asciz "Result of And : \n" szMessResultOr: .asciz "Result of Or : \n" szMessResultEor: .asciz "Result of Exclusif Or : \n" szMessResultNot: .asciz "Result of Not : \n" szMessResultLsl: .asciz "Result of left shift : \n" szMessResultLsr: .asciz "Result of right shift : \n" szMessResultAsr: .asciz "Result of Arithmetic right shift : \n" szMessResultRor: .asciz "Result of rotate right : \n" szMessResultClear: .asciz "Result of Bit Clear : \n" sMessAffBin: .ascii "Register: " sZoneBin: .space 65,' ' .asciz "\n" /************************************/ /* code section */ /************************************/ .text .global main main: ldr x0,qAdrszMessResultAnd bl affichageMess mov x0,#5 and x0,x0,#15 bl affichage2 ldr x0,qAdrszMessResultOr bl affichageMess mov x0,#5 orr x0,x0,#15 bl affichage2 ldr x0,qAdrszMessResultEor bl affichageMess mov x0,#5 eor x0,x0,#15 bl affichage2 ldr x0,qAdrszMessResultNot bl affichageMess mov x0,#5 mvn x0,x0 bl affichage2 ldr x0,qAdrszMessResultLsl bl affichageMess mov x0,#5 lsl x0,x0,#1 bl affichage2 ldr x0,qAdrszMessResultLsr bl affichageMess mov x0,#5 lsr x0,x0,#1 bl affichage2 ldr x0,qAdrszMessResultAsr bl affichageMess mov x0,#-5 bl affichage2 mov x0,#-5 asr x0,x0,#1 bl affichage2 ldr x0,qAdrszMessResultRor bl affichageMess mov x0,#5 ror x0,x0,#1 bl affichage2 ldr x0,qAdrszMessResultClear bl affichageMess mov x0,0b1111 bic x0,x0,#0b100 // clear 3ieme bit bl affichage2 mov x0,0b11111 bic x0,x0,#6 // clear 2ieme et 3ième bit ( 6 = 110 binary) bl affichage2 100: mov x0, #0 mov x8,EXIT svc 0 qAdrszMessResultAnd: .quad szMessResultAnd qAdrszMessResultOr: .quad szMessResultOr qAdrszMessResultEor: .quad szMessResultEor qAdrszMessResultNot: .quad szMessResultNot qAdrszMessResultLsl: .quad szMessResultLsl qAdrszMessResultLsr: .quad szMessResultLsr qAdrszMessResultAsr: .quad szMessResultAsr qAdrszMessResultRor: .quad szMessResultRor qAdrszMessResultClear: .quad szMessResultClear /******************************************************************/ /* display register in binary */ /******************************************************************/ /* x0 contains the register */ /* x1 contains the address of receipt area */ affichage2: stp x1,lr,[sp,-16]! // save registers ldr x1,qAdrsZoneBin bl conversion2 ldr x0,qAdrsZoneMessBin bl affichageMess ldp x1,lr,[sp],16 // restaur 2 registres ret // retour adresse lr x30 qAdrsZoneBin: .quad sZoneBin qAdrsZoneMessBin: .quad sMessAffBin /******************************************************************/ /* register conversion in binary */ /******************************************************************/ /* x0 contains the value */ /* x1 contains the address of receipt area */ conversion2: stp x2,lr,[sp,-16]! // save registers stp x3,x4,[sp,-16]! // save registers mov x3,64 // position counter of the written character 2: // loop tst x0,1 // test first bit lsr x0,x0,#1 // shift right one bit bne 3f mov x2,#48 // bit = 0 => character '0' b 4f 3: mov x2,#49 // bit = 1 => character '1' 4: strb w2,[x1,x3] // character in reception area at position counter subs x3,x3,#1 // 0 bits ? bgt 2b // no! loop 100: ldp x3,x4,[sp],16 // restaur 2 registres ldp x2,lr,[sp],16 // restaur 2 registres ret // retour adresse lr x30 /***************************************************/ /* ROUTINES INCLUDE */ /***************************************************/ /* for this file see task include a file in language AArch64 assembly*/ .include "../includeARM64.inc"