From ac76498cb30ea532aef6cf9fee56ca49f6d4b6fe Mon Sep 17 00:00:00 2001
From: Jeff Hammond <jeff.r.hammond@intel.com>
Date: Mon, 21 Sep 2015 13:43:14 +0000
Subject: [PATCH] use reasonable tilesize explicitly

---
 QA/tests/tce_ccsd_t_h2o/tce_ccsd_t_h2o.nw | 1 +
 1 file changed, 1 insertion(+)

diff --git a/QA/tests/tce_ccsd_t_h2o/tce_ccsd_t_h2o.nw b/QA/tests/tce_ccsd_t_h2o/tce_ccsd_t_h2o.nw
index d552a2202a..1037302407 100644
--- a/QA/tests/tce_ccsd_t_h2o/tce_ccsd_t_h2o.nw
+++ b/QA/tests/tce_ccsd_t_h2o/tce_ccsd_t_h2o.nw
@@ -35,6 +35,7 @@ end
 tce
 ccsd(t)
 io ga
+tilesize 20
 end
 
 task tce energy